潘浩林 | Haolin Pan | Institute of Software, Chinese Academy of Sciences

About

I am 潘浩林 (Haolin Pan), a Ph.D. candidate at the Institute of Software, Chinese Academy of Sciences. My research focuses on AI Infra, compiler optimization, compiler auto-tuning, program representation learning, and SIMD optimization.

I work on building practical AI-for-compiler systems around LLVM / MLIR, including pass-sequence optimization, LLM/RL-driven compiler tuning, quasi-dynamic program representations, and high-performance SIMD library design. My recent work has appeared at NeurIPS, ICLR, ASE, CGO, SEKE, and IEEE TMC. For the latest citation record, please see my Google Scholar profile.

Education & Research

2023.09 - 2027.06, Ph.D. in Computer Software and Theory, Institute of Software, Chinese Academy of Sciences.
2021.09 - 2023.06, M.Eng. in Electronic Information, Institute of Software, Chinese Academy of Sciences.
2016.09 - 2020.06, B.Eng. in Computer Science and Technology, Zhengzhou University.
Research topics: AI Infra, AI for Compiler, LLVM / MLIR optimization, compiler auto-tuning, program representation learning, reinforcement-learning-based optimization, and SIMD performance engineering.

News

🎉 ICLR 2026: First-author paper on behavioral program embeddings was accepted.
🎉 IEEE TMC: Paper FlowXpert was accepted by IEEE Transactions on Mobile Computing.
🎉 ASE 2025: First-author paper HybridSIMD was accepted.
🎉 NeurIPS 2025: First-author paper Compiler-R1 was accepted.
🎉 SEKE 2025: First-author paper on SIMD library and compiler co-optimization was accepted.
🎉 CGO 2025: First-author paper on synergy-guided compiler auto-tuning was accepted.

Publications

TMC

FlowXpert: Context-Aware Flow Embedding for Enhanced Traffic Detection in IoT Network

C. Zha, H. Pan, B. Bai, J. Wu, R. Zhang

IEEE Transactions on Mobile Computing, 2026.

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arXiv

ECCO: Evidence-Driven Causal Reasoning for Compiler Optimization

H. Pan, L. Huang, J. Dong, M. Xing, Y. Wu

arXiv preprint arXiv:2602.00087, 2026.

PDF Page

CGO

Towards Efficient Compiler Auto-Tuning: Leveraging Synergistic Search Spaces

H. Pan, Y. Wei, M. Xing, Y. Wu, C. Zhao

CGO 2025, 614-627.

Code Page

NeurIPS

Compiler-R1: Towards Agentic Compiler Auto-Tuning with Reinforcement Learning

H. Pan, H. Lin, H. Luo, Y. Liu, K. Yao, L. Zhang, M. Xing, Y. Wu

NeurIPS 2025.

PDF Code Page

arXiv

Synergy-Guided Compiler Auto-Tuning of Nested LLVM Pass Pipelines

H. Pan, J. Dong, M. Xing, Y. Wu

arXiv preprint arXiv:2510.13184, 2025.

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arXiv

GRACE: Globally-Seeded Representation-Aware Cluster-Specific Evolution for Compiler Auto-Tuning

H. Pan, C. Zha, J. Dong, M. Xing, Y. Wu

arXiv preprint arXiv:2510.13176, 2025.

PDF Page

ASE

HybridSIMD: A Super C++ SIMD Library with Integrated Auto-Tuning Capabilities

H. Pan, X. Zhou, M. Xing, Y. Wu

IEEE/ACM International Conference on Automated Software Engineering, 2025.

Code Page

ICLR

Behavioral Embeddings of Programs: A Quasi-Dynamic Approach for Optimization Prediction

H. Pan, J. Dong, H. Zhang, H. Lin, M. Xing, Y. Wu

ICLR 2026.

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SEKE

Navigating the SIMD Optimization Maze: A Reinforcement Learning Approach to Library and Compiler Co-Optimization

H. Pan, Y. Zhang, M. Xing, Y. Wu

SEKE 2025.

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Service, Honors & Skills

Academic service: NeurIPS 2025 Reviewer, NeurIPS 2026 Reviewer, ICLR 2026 LLA Workshop Reviewer, ICASSP 2026 Reviewer.
Honors: UCAS Outstanding Student Model, UCAS Outstanding Student Cadre, UCAS Merit Student.
Patents: first inventor of two SIMD-related invention patents on automatic SIMD-library testing and hybrid SIMD-library programming.
Technical stack: LLVM, MLIR, C/C++, Python, Shell, Linux, compiler passes, vectorization, auto-tuning, and performance evaluation.